Current source circuits and methods for mass write and testing of programmable impedance elements
US8947907B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 2013 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | Apr 13, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0092
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device can include a plurality of memory cells, each including at least one element programmable between different impedance states by application of a voltage or current; a plurality of bit line groups, each bit line group including multiple bit lines, each bit line being coupled to multiple memory cells; a plurality of current source circuits coupled to the bit line groups, each current source circuit configured to couple the bit lines of its respective group to at least a first bias node or a second bias node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.