Silicon carbide semiconductor device and its manufacturing method
US8952391B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 3, 2003 |
| Grant date | Feb 10, 2015 |
| Priority date | — |
| Expiry date | Aug 26, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A silicon carbide vertical MOSFET having low ON-resistance and high blocking voltage. A first deposition film of low concentration silicon carbide of a first conductivity type is formed on the surface of a high concentration silicon carbide substrate of a first conductivity type. Formed on the first deposition film is a second deposition film that includes a high concentration gate region of a second conductivity type, with a first region removed selectively. A third deposition film is formed on the second deposition film, which includes a second region that is wider than the selectively removed first region, a high concentration source region of a first conductivity type, and a low concentration gate region of a second conductivity type. A low concentration base region of a first conductivity type is formed in contact with the first deposition film in the first and second regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.