Semiconductor device and manufacturing method thereof
US8952544B2 · kind B2 · utility
38Cited by
2References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 3, 2013 |
| Grant date | Feb 10, 2015 |
| Priority date | — |
| Expiry date | Jul 3, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18162
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fan-out package includes a molding compound, a conductive plug and a stress buffer. The conductive plug is in the molding compound. The stress buffer is between the conductive plug and the molding compound. The stress buffer has a coefficient of thermal expansion (CTE). The CTE of the stress buffer is between a CTE of the molding compound and a CTE of the conductive plug. A method of manufacturing a three dimensional includes plating a post on a substrate, and disposing a stress buffer on the sidewall of the post. The method further includes surrounding the stress buffer with a molding compound.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.