Memory cell flipping for mitigating SRAM BTI
US8958236B2 · kind B2 · utility
2Cited by
1References
20Claims
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Key dates
| Filing date | Jan 24, 2013 |
| Grant date | Feb 17, 2015 |
| Priority date | — |
| Expiry date | Apr 28, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus may comprise a memory cell configured to operate according to a voltage mode, a voltage controller coupled with the memory cell, wherein the voltage controller is configured to change the voltage mode of the memory cell between a low voltage mode and a high voltage mode, and a memory controller module coupled with the memory cell, wherein the memory controller is configured to invert a logic state stored in the memory cell based on the voltage mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.