Methods for forming templated materials
US8962354B2 · kind B2 · utility
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3References
20Claims
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Key dates
| Filing date | Sep 19, 2014 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Sep 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming layers can comprise defining a plurality of discrete site-isolated regions (SIRs) on a substrate, forming a first layer on one of the discrete SIRs, forming a second layer on the first layer, measuring a lattice parameter or an electrical property of the second layer, The process parameters for the formation of the first layer are varied in a combinatorial manner between different discrete SIRs to explore the possible layers that can result in suitable lattice matching for second layer of a desired crystalline structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.