High resistivity silicon-on-insulator substrate and method of forming
US8963293B2 · kind B2 · utility
4Cited by
6References
8Claims
0Family size
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Key dates
| Filing date | Jan 9, 2014 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Jan 9, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76254
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure and a method of forming the same. In one embodiment, a method of forming a silicon-on-insulator (SOI) wafer substrate includes: providing a handle substrate; forming a high resistivity material layer over the handle substrate, the high resistivity material layer including one of an amorphous silicon carbide (SiC), a polycrystalline SiC, an amorphous diamond, or a polycrystalline diamond; forming an insulator layer over the high resistivity material layer; and bonding a donor wafer to a top surface of the insulator layer to form the SOI wafer substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.