Semiconductor device including cladded base plate
US8963321B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 2013 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Jan 24, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a semiconductor chip joined with a substrate and a base plate joined with the substrate. The base plate includes a first metal layer clad to a second metal layer. The second metal layer is deformed to provide a pin-fin or fin cooling structure. The second metal layer has a sub-layer that has no pins and no pin-fins. The first metal layer has a first thickness and the sub-layer has a second thickness. The ratio between the first thickness and the second thickness is at least 4:1.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.