Low stress substrate and formation method
US8969192B1 · kind B1 · utility
0Cited by
0References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 27, 2010 |
| Grant date | Mar 3, 2015 |
| Priority date | — |
| Expiry date | Oct 14, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A bumped substrate is optimized to be flat post reflow. By producing the bumped substrate to be flat post reflow, device reliability is assured. More particularly, the transistor shift associated with warped substrates is avoided. Further, by producing a flat bumped substrate post reflow, reliability in the flip chip interconnections is assured as compared to the undesirable open circuits associated with warped substrates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.