Combinatorial RF bias method for PVD
US8974649B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2011 |
| Grant date | Mar 10, 2015 |
| Priority date | — |
| Expiry date | Jun 2, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J37/34
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
In some embodiments of the present invention, a shield is provided wherein the shield comprises a ceramic insulation material. The ceramic insulation material fills the space between the shield and the substrate surface and maintains a gap of less than about 2 mm and advantageously, less than about 1 mm. The shield may further be connected to ground through a low-pass filter operable to prevent the loss of high frequency RF power through the shield to ground but allow the dissipation of charge from the shield to ground through a low frequency or DC signal. In some embodiments, the ceramic insulating material further comprises a removable ceramic insert. The ceramic insert may be used to select the size of the aperture. The ceramic insert further comprises a slot operable to isolate the bottom lip of the ceramic insert from the upper portion for a PVD deposition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.