Rearranging write data to avoid hard errors
US8977929B2 · kind B2 · utility
11Cited by
7References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2013 |
| Grant date | Mar 10, 2015 |
| Priority date | — |
| Expiry date | Sep 5, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This disclosure relates to avoiding a hard error in memory during write time by shifting data to be programmed to memory to mask the hard error. In one implementation, a method of programming data to a memory array includes obtaining error data corresponding to a selected memory cell, shifting a data pattern such that a value to be stored by the selected memory cell matches a value associated with a hard error, and programming the shifted data pattern to memory array such that the value programmed to the selected memory cell matches the value associated with the hard error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.