Metal PVD-free conducting structures
US8981564B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 20, 2013 |
| Grant date | Mar 17, 2015 |
| Priority date | — |
| Expiry date | May 20, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Structures and methods of forming the same are disclosed herein. In one embodiment, a structure can comprise a region having first and second oppositely facing surfaces. A barrier region can overlie the region. An alloy region can overlie the barrier region. The alloy region can include a first metal and one or more elements selected from the group consisting of silicon (Si), germanium (Ge), indium (Id), boron (B), arsenic (As), antimony (Sb), tellurium (Te), or cadmium (Cd).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.