Back bias during program verify of non-volatile storage
US8988947B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 14, 2014 |
| Grant date | Mar 24, 2015 |
| Priority date | — |
| Expiry date | Mar 14, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Different back bias (or body bias) conditions are applied to a non-volatile storage system during different program verify operations of a programming operation. A back bias may be applied during verify of an intermediate state (e.g., a lower page, middle page). The intermediate state is a state that exists during a program operation, but is not one of the final states. A lower back bias or no back bias is applied during verify of a final state (e.g., an upper page). Thus, a different back bias may be used when verifying an intermediate state than the back bias used when verifying a final state. Using the back bias makes it easier to verify a low VTH, such as a negative VTH. Also, using the back bias is effective at dealing with sense amplifier headroom issues.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.