FinFET device having a merged source drain region under contact areas and unmerged fins between contact areas, and a method of manufacturing same
US8993406B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2013 |
| Grant date | Mar 31, 2015 |
| Priority date | — |
| Expiry date | Sep 20, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/151
Abstract
A method for manufacturing a fin field-effect transistor (FinFET) device, comprises forming a plurality of fins on a substrate, forming a plurality of gate regions on portions of the fins, wherein the gate regions are spaced apart from each other, forming spacers on each respective gate region, epitaxially growing a first epitaxy region on each of the fins, stopping growth of the first epitaxy regions prior to merging of the first epitaxy regions between adjacent fins, forming a dielectric layer on the substrate including the fins and first epitaxy regions, removing the dielectric layer and first epitaxy regions from the fins at one or more portions between adjacent gate regions to form one or more contact area trenches, and epitaxially growing a second epitaxy region on each of the fins in the one or more contact area trenches, wherein the second epitaxy regions on adjacent fins merge with each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.