Direct multi-level cell programming
US8995194B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2014 |
| Grant date | Mar 31, 2015 |
| Priority date | — |
| Expiry date | Oct 8, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5643
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is performed in a data storage device that includes a controller coupled to a non-volatile memory. The non-volatile memory includes a group of storage elements. Each storage element is configured to store multiple data bits. Data is sent from the controller to the non-volatile memory and first bits corresponding to a first portion of the data are stored into the group of storage elements during a first write stage. Each storage element of the group of storage elements stores at least one bit of the first bits upon completion of the first write stage. Second bits corresponding to a second portion of the data are sent to a second memory without sending the first bits to the second memory. The second bits are retrieved from the second memory and at least the second bits are stored into the group of storage elements during a second write stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.