Resistive devices and methods of operation thereof
US9001553B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 6, 2012 |
| Grant date | Apr 7, 2015 |
| Priority date | — |
| Expiry date | May 31, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0073
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of operating a resistive switching device includes applying a program stress to a two terminal resistive memory unit. The program stress is applied at a program voltage configured to change a state of the memory unit from a first state to a second state. The method further includes applying a verification/stabilization stress to the two terminal resistive memory unit. The verification/stabilization stress is applied at a verification/stabilization voltage. An erase stress is applied to the two terminal resistive memory unit. The erase stress is applied at an erase voltage configured to change a state of the memory unit from the second state to the first state. The verification/stabilization voltage is between the program voltage and the erase voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.