Inventor · Santa Clara, CA, US

Deepak Kamalanathan

23Patents
5h-index
26Co-inventors
65Inventor score

Filing activity: Apr 2, 2012 → Mar 28, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US9165644B2 Method of operating a resistive memory device with a ramp-up/ramp-down program/erase pulse Physics 24 Active
US9029829B1 Resistive switching memories Physics 9 Active
US8995167B1 Reverse program and erase cycling algorithms Physics 8 Active
US8730752B1 Circuits and methods for placing programmable impedance memory elements in high impedance states Physics 7 Active
US9025396B1 Pre-conditioning circuits and methods for programmable impedance elements in memory devices Physics 6 Active
US10153430B1 Germanium-based barrier modulated cell Electricity 5 Active
US9001553B1 Resistive devices and methods of operation thereof Physics 4 Active
US9373786B1 Two terminal resistive access devices and methods of formation thereof Electricity 4 Active
US9007808B1 Safeguarding data through an SMT process Physics 3 Active
US9613693B1 Methods for setting a resistance of programmable resistance memory cells and devices including the same Physics 2 Active
US9530495B1 Resistive switching memory having a resistor, diode, and switch memory cell Physics 2 Active
US10283708B2 Methods and apparatus for three-dimensional nonvolatile memory Electricity 2 Active
US9472272B2 Resistive switching memory with cell access by analog signal controlled transmission gate Physics 2 Active
US9734902B2 Resistive memory device with ramp-up/ramp-down program/erase pulse Physics 2 Active
US11127458B1 Non-uniform state spacing in multi-state memory element for low-power operation Physics 1 Active
US11017856B1 Soft reset for multi-level programming of memory cells in non-Von Neumann architectures Physics 1 Active
US11616195B2 Dual oxide analog switch for neuromorphic switching Physics 1 Active
US9524777B1 Dual program state cycling algorithms for resistive switching memory device Physics 0 Active
US10283567B2 Methods and apparatus for three-dimensional nonvolatile memory Electricity 0 Active
US11362275B2 Annealing processes for memory devices Electricity 0 Active
US9368198B1 Circuits and methods for placing programmable impedance memory elements in high impedance states Physics 0 Active
US12178146B2 Dual oxide analog switch for neuromorphic switching Physics 0 Active
US11790989B2 Soft reset for multi-level programming of memory cells in non-von neumann architectures Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.