Device specific configuration of operating voltage
US9015023B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 2010 |
| Grant date | Apr 21, 2015 |
| Priority date | — |
| Expiry date | Mar 8, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and circuit for device specific configuration of an operating voltage is provided. A circuit design is analyzed to determine a maximum gate-level delay for the circuit design. A minimum voltage value corresponding to the maximum gate-level delay is determined along with a default voltage value corresponding to a default gate-level delay. A voltage scaling factor corresponding to the minimum voltage and default voltage values is determined. The circuit design is synthesized such that the synthesized design includes the voltage scaling value. The synthesized design specifies setting an operating voltage to a value of a startup voltage value scaled by the voltage scaling value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.