Silicon etch with passivation using chemical vapor deposition
US9018098B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2008 |
| Grant date | Apr 28, 2015 |
| Priority date | — |
| Expiry date | Jul 1, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32137
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A silicon layer is etched through a patterned mask formed thereon using an etch chamber. A fluorine (F) containing etch gas and a silicon (Si) containing chemical vapor deposition gas are provided in the etch chamber. The fluorine (F) containing etch gas is used to etch features into the silicon layer, and the silicon (Si) containing chemical vapor deposition gas is used to form a silicon-containing deposition layer on sidewalls of the features. A plasma is generated from the etch gas and the chemical vapor deposition gas, and a bias voltage is provided. Features are etched into the silicon layer using the plasma, and a silicon-containing passivation layer is deposited on the sidewalls of the features which are being etched. Silicon in the passivation layer primarily comes from the chemical vapor deposition gas. The etch gas and the chemical vapor deposition gas are then stopped.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.