fin FET and method of fabricating same
US9018697B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2012 |
| Grant date | Apr 28, 2015 |
| Priority date | — |
| Expiry date | Nov 1, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
Abstract
A fin field effect transistor (fin FET) is formed using a bulk silicon substrate and sufficiently guarantees a top channel length formed under a gate, by forming a recess having a predetermined depth in a fin active region and then by forming the gate in an upper part of the recess. A device isolation film is formed to define a non-active region and a fin active region in a predetermined region of the substrate. In a portion of the device isolation film a first recess is formed, and in a portion of the fin active region a second recess having a depth shallower than the first recess is formed. A gate insulation layer is formed within the second recess, and a gate is formed in an upper part of the second recess. A source/drain region is formed in the fin active region of both sides of a gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.