Semiconductor package and manufacturing method thereof
US9018741B2 · kind B2 · utility
1Cited by
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24Claims
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Key dates
| Filing date | Jan 11, 2013 |
| Grant date | Apr 28, 2015 |
| Priority date | — |
| Expiry date | Mar 16, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04R19/04
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor package is presented which has a suitable structure for effectively shielding electromagnetic wave interference (EMI) in a cavity area to which a semiconductor chip is attached. The semiconductor package is assembled such that a lower substrate to which the semiconductor chip is attached is adhered to an EMI shielding & electric I/O body having various types of EMI shielding & electric I/O metal patterns by soldering. Further, the EMI shielding & electric I/O body is adhered to an upper substrate by soldering thereby simplifying assembling of the semiconductor package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.