Methods for fabricating integrated circuits including generating e-beam patterns for directed self-assembly
US9023730B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2013 |
| Grant date | May 5, 2015 |
| Priority date | — |
| Expiry date | Nov 6, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0273
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes generating an e-beam pattern for forming a DSA directing pattern on a semiconductor substrate. The DSA directing pattern is configured to guide a self-assembly material deposited thereon that undergoes directed self-assembly (DSA) to form a DSA pattern. Generating the e-beam pattern includes using a computing system, inputting a DSA target pattern. Using the computing system, the DSA target pattern, a DSA model, and an EBPC model, an output EBPCed pattern is produced for an e-beam writer to write on a resist layer that overlies the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.