System and method for manufacturing three dimensional integrated circuits
US9025136B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 2, 2011 |
| Grant date | May 5, 2015 |
| Priority date | — |
| Expiry date | Jul 4, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70491
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
System and method for manufacturing three-dimensional integrated circuits are disclosed. In one embodiment, the method includes providing an imaging writer system that includes a plurality of spatial light modulator (SLM) imaging units arranged in one or more parallel arrays, receiving mask data to be written to one or more layers of the three-dimensional integrated circuit, processing the mask data to form a plurality of partitioned mask data patterns corresponding to the one or more layers of the three-dimensional integrated circuit, assigning one or more SLM imaging units to handle each of the partitioned mask data pattern, and controlling the plurality of SLM imaging units to write the plurality of partitioned mask data patterns to the one or more layers of the three-dimensional integrated circuits in parallel. The method of assigning performs at least one of scaling, alignment, inter-ocular displacement, rotational factor, or substrate deformation correction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.