Patent · US Active

Nonvolatile semiconductor memory device including floating gate electrodes formed between control gate electrodes and vertically formed along a semiconductor pillar

US9029934B2 · kind B2 · utility

2Cited by
5References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 17, 2013
Grant dateMay 12, 2015
Priority date
Expiry dateJun 13, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/6891
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A nonvolatile semiconductor memory device includes: forming a stacked body by alternately stacking a plurality of interlayer insulating films and a plurality of control gate electrodes; forming a through-hole extending in a stacking direction in the stacked body; etching a portion of the interlayer insulating film facing the through-hole via the through-hole to remove the portion; forming a removed portion; forming a first insulating film on inner faces of the through-hole and the portion in which the interlayer insulating films are removed; forming a floating gate electrode in the portion in which the interlayer insulating films are removed; forming a second insulating film so as to cover a portion of the floating gate electrode facing the through-hole; and burying a semiconductor pillar in the through-hole.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.