Patent · US Active

Method and structure for dielectric isolation in a fin field effect transistor

US9034715B2 · kind B2 · utility

1Cited by
7References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 12, 2013
Grant dateMay 19, 2015
Priority date
Expiry dateMay 11, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/038

Abstract

A finFET and method of fabrication are disclosed. A sacrificial layer is formed on a bulk semiconductor substrate. A top semiconductor layer (such as silicon) is disposed on the sacrificial layer. The bulk semiconductor substrate is recessed in the area adjacent to the transistor gate and a stressor layer is formed in the recessed area. The sacrificial layer is selectively removed and replaced with an insulator, such as a flowable oxide. The insulator provides isolation between the transistor channel and the bulk substrate without the use of dopants.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.