Patent · US Active

Mechanism to provide workload and configuration-aware deterministic performance for microprocessors

US9037840B2 · kind B2 · utility

4Cited by
8References
20Claims
0Family size

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Key dates

Filing dateJun 29, 2012
Grant dateMay 19, 2015
Priority date
Expiry dateApr 2, 2033

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An apparatus that includes a semiconductor chip having a processor and an on-die non-volatile storage resource is described. The on-die non volatile storage is to store different, appropriate performance related information for different configurations and/or usage cases of the processor for a same performance state of the processor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.