Power MOS transistor with integrated gate-resistor

US9041120B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Stephan Voss · Munich, DE
• Peter Tuerkes · Unterhaching, DE
• Holger Huesken · Munich, DE

Key dates

• Filing date: Jul 25, 2013
• Grant date: May 26, 2015
• Expiry date: Jul 25, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K17/168
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A transistor device comprises: at least one individual transistor cell arranged in a transistor cell field on a semiconductor body, each individual transistor cell comprising a gate electrode; a gate contact, electrically coupled to the gate electrodes of the transistor cells and configured to switch on the at least one transistor cell by providing a gate current in a first direction and configured to switch off the at least one transistor cell by providing a gate current in a second direction, the second direction being opposite to the first direction; at least one gate-resistor structure monolithically integrated in the transistor device, the gate-resistor structure providing a first resistance for the gate current when the gate current flows in the first direction, and providing a second resistance for the gate current, which is different from the first resistance, when the gate current flows in the second direction.