Encapsulated semiconductor chips with wiring including controlling chip and method of making the same
US9041186B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2013 |
| Grant date | May 26, 2015 |
| Priority date | — |
| Expiry date | Mar 22, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a semiconductor device including first and second semiconductor elements, first and second external connection terminals and a sealing member. The first external connection terminal is provided at a first surface of the first semiconductor element. The second semiconductor element is provided at a second surface side, that is at a side opposite to the first surface, of the first semiconductor element. The second external connection terminal is connected to the second semiconductor element, and the second external connection terminal is configured to be, together with the first external connection terminal, connected to a wiring board. The sealing member seals the first and second semiconductor elements and exposes a portion, that is configured to be connected to the wiring board, of the first external connection terminal and a portion, that is configured to be connected to the wiring board, of the second external connection terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.