Programmable window of operation for CBRAM
US9047948B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2012 |
| Grant date | Jun 2, 2015 |
| Priority date | — |
| Expiry date | Sep 12, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Structures and methods for control of an operating window of a programmable impedance element are disclosed herein. In one embodiment, a semiconductor memory device can include: (i) a memory array having a programmable impedance element; (ii) a register configured to be programmed with data that represents an erase verify value, a program verify value, and a read trip point resistance value, for the memory array; (iii) a controller configured to determine a mode of operation for the memory array; (iv) a register access circuit configured to read the register to obtain data that corresponds to the mode of operation; and (v) a voltage generator configured to generate a reference voltage based on the register data, where the reference voltage is used to perform an operation on the programmable impedance element corresponding to the mode of operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.