Word line coupling for deep program-verify, erase-verify and read
US9047970B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2013 |
| Grant date | Jun 2, 2015 |
| Priority date | — |
| Expiry date | Oct 28, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a non-volatile storage system, a reduced voltage is provided on a selected word line during a sensing operation, using down coupling from one or more adjacent word lines. Voltages of one or more adjacent word lines of a selected word line are driven down while a voltage of the selected word line is floated. Capacitive coupling from the one or more adjacent word lines to the selected word line reduces the voltage of the selected word line. The capacitive coupling can be provided during a read, a program-verify test or an erase-verify test. The erase-verify test can be performed on cells of even-numbered word lines while capacitive coupling is provided by odd-numbered word lines, or on cells of odd-numbered word lines while capacitive coupling is provided by even-numbered word lines. Voltages of non-adjacent word lines can be provided at fixed, pass voltage levels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.