Structure and production process of a microelectronic 3D memory device of flash NAND type
US9053976B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2009 |
| Grant date | Jun 9, 2015 |
| Priority date | — |
| Expiry date | Mar 12, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
A microelectronic flash memory device including a plurality of memory cells including transistors fitted with a matrix of channels connecting a block of common source to a second block on which bit lines rest, the transistors also being formed by a plurality of gates including at least one gate material, including a first selection gate coating the channels, a plurality of control gates coating the channels, a plurality of second selection gates each coating the channels of the same row and the matricial arrangement, at least one or more of the gates based on superposition of layers including at least one first layer of dielectrical material, at least one charge store zone, and at least one second layer of dielectrical material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.