Semiconductor device having vertical gates and fabrication thereof

US9059142B2 · kind B2 · utility

Assignee

• NANYA TECHNOLOGY CORPORATION · TW

Inventors

• Wen-Ping Liang · Taoyuan, TW
• Chiang-Hung Lin · Taipei, TW
• Kuo-Hui Su · Taipei, TW

Key dates

• Filing date: Jul 23, 2012
• Grant date: Jun 16, 2015
• Expiry date: Jul 23, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/691

Abstract

A method for forming a semiconductor device with a vertical gate is disclosed, including providing a substrate, forming a recess in the substrate, forming a gate dielectric layer on a sidewall and a bottom of the recess, forming an adhesion layer in the recess and on the gate dielectric layer, wherein the adhesion layer is a metal silicide nitride layer, and forming a gate layer in the recess and on the adhesion layer.