Methods for processing a semiconductor wafer
US9059273B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2013 |
| Grant date | Jun 16, 2015 |
| Priority date | — |
| Expiry date | Aug 30, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/03001
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for processing a semiconductor wafer in accordance with various embodiments may include: providing a semiconductor wafer including at least one chip and at least one kerf region adjacent to the at least one chip, the kerf region including at least one auxiliary structure; applying a mask layer to the semiconductor wafer; removing the at least one auxiliary structure in the at least one kerf region; removing the applied mask layer; and separating the semiconductor wafer along the at least one kerf region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.