Michael Roesner
28Patents
4h-index
42Co-inventors
59Inventor score
Filing activity: Jun 8, 2001 → May 30, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9496193B1 | Semiconductor chip with structured sidewalls | Electricity | 27 | Active |
| US9673096B2 | Method for processing a semiconductor substrate and a method for processing a semiconductor wafer | Electricity | 21 | Active |
| US6633379B2 | Apparatus and method for measuring the degradation of a tool | Physics | 14 | Expired |
| US6752694B2 | Apparatus for and method of wafer grinding | Performing Operations; Transporting | 9 | Expired |
| US10032670B2 | Plasma dicing of silicon carbide | Electricity | 4 | Active |
| US9704748B2 | Method of dicing a wafer | Electricity | 2 | Active |
| US9610543B2 | Method for simultaneous structuring and chip singulation | Emerging Cross-Sectional Technologies | 1 | Active |
| US9368436B2 | Source down semiconductor devices and methods of formation thereof | Electricity | 1 | Active |
| US8815706B2 | Methods of forming semiconductor devices | Electricity | 1 | Active |
| US10157765B2 | Methods for processing a semiconductor workpiece | Electricity | 1 | Active |
| US10186458B2 | Component and method of manufacturing a component using an ultrathin carrier | Electricity | 0 | Active |
| US9059273B2 | Methods for processing a semiconductor wafer | Electricity | 0 | Active |
| US11195713B2 | Methods of forming a silicon-insulator layer and semiconductor device having the same | Electricity | 0 | Active |
| US10373868B2 | Method of processing a porous conductive structure in connection to an electronic component on a substrate | Electricity | 0 | Active |
| US10020264B2 | Integrated circuit substrate and method for manufacturing the same | Electricity | 0 | Active |
| US10622218B2 | Segmented edge protection shield | Electricity | 0 | Active |
| US9449876B2 | Singulation of semiconductor dies with contact metallization by electrical discharge machining | Electricity | 0 | Active |
| US10643917B2 | Magnetic phase change material for heat dissipation | Electricity | 0 | Active |
| US9793129B2 | Segmented edge protection shield | Electricity | 0 | Active |
| US11063014B2 | Semiconductor devices including a metal silicide layer and methods for manufacturing thereof | Electricity | 0 | Active |
| US10672716B2 | Integrated circuit substrate and method for manufacturing the same | Electricity | 0 | Active |
| US11367654B2 | Component and method of manufacturing a component using an ultrathin carrier | Electricity | 0 | Active |
| US11282805B2 | Silicon carbide devices and methods for manufacturing the same | Electricity | 0 | Active |
| US11077525B2 | Method of processing a silicon carbide containing crystalline substrate, silicon carbide chip, and processing chamber | Performing Operations; Transporting | 0 | Active |
| US10005659B2 | Method for simultaneous structuring and chip singulation | Emerging Cross-Sectional Technologies | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.