Patent · US Active

Enhanced flip chip package

US9059304B2 · kind B2 · utility

6Cited by
4References
33Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 27, 2014
Grant dateJun 16, 2015
Priority date
Expiry dateJan 27, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/3511
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

According to various embodiments, a flip chip package structure is provided in which a redistribution layer (RDL) is disposed on a surface of both a semiconductor chip and one or more lateral extensions of the semiconductor chip surface. The lateral extensions may be made using, e.g., a reconstituted wafer to implement a fanout region lateral to one or more sides of the semiconductor chip. One or more electrical connectors such as solder bumps or copper cylinders may be applied to the RDL, and an interposer such as a PCB interposer may be connected to the electrical connectors. In this way, a relatively tight semiconductor pad pitch may be accommodated and translated to an appropriate circuit board pitch without necessarily requiring a silicon or glass interposer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.