In-situ annealing for extending the lifetime of CMOS products
US9064824B2 · kind B2 · utility
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7References
19Claims
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Key dates
| Filing date | Nov 12, 2013 |
| Grant date | Jun 23, 2015 |
| Priority date | — |
| Expiry date | Nov 12, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for packaging a functional chip, methods for annealing a functional chip, and chip assemblies. A functional chip and an annealing chip are located inside a package. The functional chip includes an integrated circuit. The annealing chip includes an annealing element source comprised of an annealing element or a light source configured to emit electromagnetic radiation. The integrated circuit of the functional chip receives the annealing element, electromagnetic radiation, or both from the annealing chip in order to perform an annealing procedure that extends the useful lifetime of the packaged integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.