Methods of forming gate structures by a gate-cut-last process and the resulting structures
US9064932B1 · kind B1 · utility
81Cited by
1References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 2, 2014 |
| Grant date | Jun 23, 2015 |
| Priority date | — |
| Expiry date | May 2, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One method disclosed includes, among other things, forming an uncut line-type gate structure above first and second spaced-apart active regions of a semiconductor substrate, forming a sidewall spacer around a perimeter of the line-type gate structure, performing at least one etching process to remove an axial portion of a gate cap layer and an axial portion of a gate electrode that are positioned above the isolation region so as to thereby define first and second cut end surfaces of first and second gate electrodes, respectively, and an isolation plug cavity and forming a gate cut isolation plug in the isolation plug cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.