Integrated circuits including epitaxially grown strain-inducing fills doped with boron for improved robustness from delimination and methods for fabricating the same

US9064961B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Joanna Wasyluk · Dresden, DE
• Carsten Reichel · Dresden, DE
• Joachim Patzer · Rohrbach, DE
• Kai Wurster · Dresden, DE

Key dates

• Filing date: Sep 18, 2013
• Grant date: Jun 23, 2015
• Expiry date: Sep 18, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/83125
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Integrated circuits and methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a cavity in a semiconductor region laterally adjacent to a gate electrode structure. An EPI strain-inducing fill is deposited into the cavity. The EPI strain-inducing fill includes a main SiGe layer and a Si cap that overlies the main SiGe layer. The EPI strain-inducing fill is doped with boron and has a first peak boron content in an upper portion of the EPI strain-inducing fill of about 2.5 times or greater than an average boron content in an intermediate portion of the main SiGe layer.