Level compensation in multilevel memory
US9076547B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2012 |
| Grant date | Jul 7, 2015 |
| Priority date | — |
| Expiry date | Jun 10, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/349
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Some embodiments include apparatuses and methods having a compensation unit to provide a compensation value based at least in part on a threshold voltage value of a memory cell. At least one of such embodiments includes a controller to select a code during an operation of retrieving information from the memory cell to represent a value of information stored in the memory cell. Such a code can be associated with an address having an address value based at least in part on the compensation value. Additional apparatuses and methods are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.