Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP
US9082806B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2011 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Aug 24, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a temporary carrier. A semiconductor die is oriented with an active surface toward, and mounted to, the temporary carrier. An encapsulant is deposited with a first surface over the temporary carrier and a second surface, opposite the first surface, is deposited over a backside of the semiconductor die. The temporary carrier is removed. A portion of the encapsulant in a periphery of the semiconductor die is removed to form an opening in the first surface of the encapsulant. An interconnect structure is formed over the active surface of the semiconductor die and extends into the opening in the encapsulant layer. A via is formed and extends from the second surface of the encapsulant to the opening. A first bump is formed in the via and electrically connects to the interconnect structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.