Methods and apparatuses for void-free tungsten fill in three-dimensional semiconductor features
US9082826B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2014 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | May 22, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are methods of filling a 3-D structure of a semiconductor substrate with a tungsten-containing material. The 3-D structure may include sidewalls, a plurality of openings in the sidewalls leading to a plurality of features having a plurality of interior regions. The methods may include depositing a first layer of the tungsten-containing material within the 3-D structure such that the first layer partially fills a plurality of interior regions of the 3-D structure, etching vertically and horizontally after depositing the first layer, and depositing a second layer of the tungsten-containing material within the 3-D structure after the vertical and horizontal etching such that the second layer fills at least a portion of the interior regions left unfilled by the first layer. Also disclosed herein are apparatuses for filling a 3-D structure of a semiconductor substrate with a tungsten-containing material having a controller with instructions for etching vertically and horizontally.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.