Patent · US Active

Chip-package and a method for forming a chip-package

US9093416B2 · kind B2 · utility

2Cited by
5References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 28, 2011
Grant dateJul 28, 2015
Priority date
Expiry dateJan 25, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/18162
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A chip-package includes a chip-carrier configured to carry a chip, the chip arranged over a chip-carrier side, wherein the chip-carrier side is configured in electrical connection with a chip back side; an insulation material including: a first insulation portion formed over a first chip lateral side; a second insulation portion formed over a second chip lateral side, wherein the first chip lateral side and the second chip lateral side each abuts opposite edges of the chip back side; and a third insulation portion formed over at least part of a chip front side, the chip front side including one or more electrical contacts formed within the chip front side; wherein at least part of the first insulation portion is arranged over the chip-carrier side and wherein the first insulation portion is configured to extend in a direction perpendicular to the first chip lateral side further than the chip-carrier.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.