3D stacked non-volatile storage programming to conductive state
US9099202B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 6, 2012 |
| Grant date | Aug 4, 2015 |
| Priority date | — |
| Expiry date | Oct 16, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/35
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Programming NAND strings in a 3D stacked storage device to a conductive state. Storage elements may be erased by raising their Vt and programmed by lowering their Vt. Programming may include applying a series of increasing voltages to selected bit lines until the selected memory cell is programmed. Unselected bit lines may be held at about ground, or close to ground. The selected word line may be grounded, or be held close to ground. Unselected word lines between the selected word line and the bit line may receive about the selected bit line voltage. Unselected word lines between the source line and the selected word line may receive about half the selected bit line voltage. Programming may be achieved without boosting channels of unselected NAND strings to inhibit them from programming. Therefore, program disturb associated with leakage of boosted channel potential may be avoided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.