Methods for reproducible flash layer deposition
US9105646B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2012 |
| Grant date | Aug 11, 2015 |
| Priority date | — |
| Expiry date | Jul 19, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/696
Abstract
A method for reducing the leakage current in DRAM Metal-Insulator-Metal capacitors includes forming a flash layer between the dielectric layer and the first electrode layer. A method for reducing the leakage current in DRAM Metal-Insulator-Metal capacitors includes forming a capping layer between the dielectric layer and the second electrode layer. The flash layer and the capping layer can be formed using an atomic layer deposition (ALD) technique. The precursor materials used for forming the flash layer and the capping layer are selected such they include at least one metal-oxygen bond. Additionally, the precursor materials are selected to also include “bulky” ligands.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.