Patent · US Active

Semiconductor device and insulated gate bipolar transistor with barrier regions

US9105679B2 · kind B2 · utility

11Cited by
23References
20Claims
0Family size

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Key dates

Filing dateNov 27, 2013
Grant dateAug 11, 2015
Priority date
Expiry dateJan 2, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/393

Abstract

In a semiconductor device a barrier region is sandwiched between a drift region and a charge carrier transfer region. The barrier and charge carrier transfer regions form a pn junction. The barrier and drift regions form a homojunction. A mean impurity concentration in the barrier region is at least ten times as high as an impurity concentration in the drift region. A control structure is arranged to form an inversion layer in the drift and barrier regions in an inversion state. No inversion layer is formed in the drift and barrier regions in a non-inversion state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.