Horizontally and vertically aligned graphite nanofibers thermal interface material for use in chip stacks

US9111899B2 · kind B2 · utility

Assignee

• Lenovo · SG

Inventors

• Gerald K. Bartley · Rochester, US
• Charles L. Johnson · Rochester, US
• John E. Kelly, III · Poughquag, US
• Joseph Kuczynski · North Port, US
• David R. Motschman · Rochester, US
• Arvind K. Sinha · Rochester, US
• Kevin A. Splittstoesser · Stewartville, US
• Timothy J. Tofil · Rochester, US

Key dates

• Filing date: Sep 13, 2012
• Grant date: Aug 18, 2015
• Expiry date: Sep 27, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/01322
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes a thermal interface material pad placed between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip and nanofibers aligned perpendicular to mating surfaces of the first chip and the second chip.