Methods and structures for back end of line integration
US9117822B1 · kind B1 · utility
9Cited by
1References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2014 |
| Grant date | Aug 25, 2015 |
| Priority date | — |
| Expiry date | Apr 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide a semiconductor structure for BEOL (back end of line) integration. A directed self assembly (DSA) material is deposited and annealed to form two distinct phase regions. One of the phase regions is selectively removed, and the remaining phase region serves as a mask for forming cavities in an underlying layer of metal and/or dielectric. The process is then repeated to form complex structures with patterns of metal separated by dielectric regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.