Sunil Kumar Singh
62Patents
7h-index
86Co-inventors
75Inventor score
Filing activity: Dec 8, 1998 → Dec 26, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6325808A | Robotic system, docking station, and surgical tool for collaborative control in minimally invasive surgery | Human Necessities | 741 | Expired |
| US8652962B2 | Etch damage and ESL free dual damascene metal interconnect | Electricity | 19 | Active |
| US10312188B1 | Interconnect structure with method of forming the same | Electricity | 13 | Active |
| US9117822B1 | Methods and structures for back end of line integration | Electricity | 9 | Active |
| US10347528B1 | Interconnect formation process using wire trench etch prior to via etch, and related interconnect | Electricity | 8 | Active |
| US9576894B2 | Integrated circuits including organic interlayer dielectric layers and methods for fabricating the same | Electricity | 7 | Active |
| US7682963B2 | Air gap for interconnect application | Electricity | 7 | Active |
| US9786549B2 | Etch damage and ESL free dual damascene metal interconnect | Electricity | 6 | Active |
| US9524935B2 | Filling cavities in an integrated circuit and resulting devices | Electricity | 6 | Active |
| US9142451B2 | Reduced capacitance interlayer structures and fabrication methods | Electricity | 5 | Active |
| US10084093B1 | Low resistance conductive contacts | Electricity | 5 | Active |
| US11515205B2 | Conductive structures for contacting a top electrode of an embedded memory device and methods of making such contact structures on an IC product | Electricity | 4 | Active |
| US9093501B2 | Interconnection wires of semiconductor devices | Electricity | 3 | Active |
| US10177029B1 | Integration of air gaps with back-end-of-line structures | Electricity | 3 | Active |
| US9362162B2 | Methods of fabricating BEOL interlayer structures | Electricity | 3 | Active |
| US9691654B1 | Methods and devices for back end of line via formation | Electricity | 3 | Active |
| US8778794B1 | Interconnection wires of semiconductor devices | Electricity | 2 | Active |
| US6485975B1 | Method for regenerating viable and fertile citrus plants by tissue culture from explants | Chemistry; Metallurgy | 2 | Expired |
| US10312136B2 | Etch damage and ESL free dual damascene metal interconnect | Electricity | 2 | Active |
| US9318377B2 | Etch damage and ESL free dual damascene metal interconnect | Electricity | 2 | Active |
| US9353114B2 | Process for the preparation of dipeptidylpeptidase inhibitors | Chemistry; Metallurgy | 1 | Active |
| US10504774B2 | Lithographic patterning to form fine pitch features | Electricity | 1 | Active |
| US11171041B2 | Etch damage and ESL free dual damascene metal interconnect | Electricity | 1 | Active |
| US10886287B2 | Multiple-time programmable (MTP) memory device with a wrap-around control gate | Electricity | 0 | Active |
| US9741605B2 | Reducing defects and improving reliability of BEOL metal fill | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.