Capacitive test method, apparatus and system for semiconductor packages
US9121884B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2013 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | Feb 25, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/67
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A multi-channel probe plate includes an electrically insulating body with opposing first and second main surfaces, and a plurality of spaced apart electrically conductive coupling regions embedded in or attached to the body at the first main surface. Each of the coupling regions covers a different zone of a semiconductor package when the package is positioned in close proximity to the first main surface of the plate. Circuitry electrically connected to each of the coupling regions of the probe plate via a different channel is operable to: measure a parameter indicative of the degree of capacitive coupling between each coupling region of the probe plate and the zone of the semiconductor package covered by the corresponding coupling region; provide a capacitance signal based on the parameter measured for each of the coupling regions of the probe plate; and select different ones of the capacitance signals for analysis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.