Vertical trench MOSFET device in integrated power technologies
US9123802B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2013 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | Oct 3, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define at least one vertical drift region bounded on at least two opposite sides by the deep trench structures. The deep trench structures include dielectric liners. The deep trench structures are spaced so as to form RESURF regions for the drift region. Vertical gates are formed in vertically oriented gate trenches in the dielectric liners of the deep trench structures, abutting the vertical drift regions. A body implant mask for implanting dopants for the transistor body is also used as an etch mask for forming the vertically oriented gate trenches in the dielectric liners.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.