Silicon and silicon germanium nanowire structures
US9129829B2 · kind B2 · utility
58Cited by
8References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 9, 2014 |
| Grant date | Sep 8, 2015 |
| Priority date | — |
| Expiry date | May 9, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Methods of forming microelectronic structures are described. Embodiments of those methods include forming a nanowire device comprising a substrate comprising source/drain structures adjacent to spacers, and nanowire channel structures disposed between the spacers, wherein the nanowire channel structures are vertically stacked above each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.